A Comparative Analysis of Gate Leakage and Performance of High-K Nanoscale CMOS Logic Gates
نویسندگان
چکیده
•Several materials have been investigated for use in nano-CMOS technology, such as ZrO2, TiO2, BST, HfO2, Al2O3, SiON, and Si3N4. •Intel has recently prototyped a processor called Penryn using such transistors of 45nm technology. •For compact modeling based study of high-K non-classical transistors using BSIM4/5, two possible options can be considered: (i) varying the model parameter in the model card that denotes relative permittivity (EPSROX) (ii) finding the equivalent oxide thickness (EOT) for a dielectric under consideration. • Calculated by evaluating both the source and drain components. • For a MOS, Iox = (Igs +Igd +Igcs +Igcd +Igb). • Values of individual components depends on states: ON, OFF, or transition
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